Refer My Notes

Processors generally have one or more layers of memory cache (eg. L1 cache, L2 cache and L3 cache etc.) in multiprocessor systems which improves performance by speeding access to data (because the data is closer to the processor) and reducing traffic on the shared memory bus (because many memory operations can be satisfied by local caches.) Memory caches can improve performance tremendously, but they present a host of new challenges. For example - What would happens when two processors examine the same memory location at the same time? Under what conditions will they see the same value? A memory model defines necessary and sufficient conditions for knowing that writes to memory by other processors are visible to the current processor, and writes by the current processor are visible to other processors. Some processors exhibit a strong memory model, where all processors see exactly the same value for any given memory location at all times. Other processors exhibit a weaker memo...